CWE-1223 Base Incompleto

Race Condition for Write-Once Attributes

This vulnerability occurs when an untrusted software component wins a race condition and writes to a hardware register before the trusted component can, permanently locking in an insecure value…

Definición

What is CWE-1223?

This vulnerability occurs when an untrusted software component wins a race condition and writes to a hardware register before the trusted component can, permanently locking in an insecure value because the register is designed to be written only once.

In hardware design, critical security settings are often stored in write-once registers. These registers allow software to set a value—like a system configuration or a security policy—a single time after a reset, after which they become read-only. This mechanism is intended to let trusted boot firmware establish a secure baseline that untrusted runtime software cannot later alter. A security flaw emerges when the hardware design does not properly sequence access to these registers. If an untrusted software module (Module B) can issue a write command before the trusted module (Module A) does, the untrusted value gets permanently locked in. The trusted module's subsequent write is ignored, leaving the system configured with potentially insecure or incorrect settings for its entire operational lifetime.

Impacto en el mundo real

Real-world CVEs caused by CWE-1223

Todavía no hay CVEs públicos enlazados a esta CWE en el catálogo de MITRE.

Cómo lo explotan los atacantes

Ruta del atacante paso a paso

1
Identifica una ruta de código que maneje entrada no confiable sin validación.
2
Crea un payload que ejercite el comportamiento inseguro — inyección, traversal, overflow o abuso de lógica.
3
Envía el payload a través de una solicitud normal y observa la reacción de la aplicación.
4
Itera hasta que la respuesta filtre datos, ejecute código del atacante o escale privilegios.

Ejemplo de código vulnerable

Vulnerable Verilog

consider the example design module system verilog code shown below. register_write_once_example module is an example of register that has a write-once field defined. Bit 0 field captures the write_once_status value.

Vulnerable Verilog

module register_write_once_example
 (

```
   input [15:0] Data_in,
   input Clk,
   input ip_resetn,
   input global_resetn,
   input write,
   output reg [15:0] Data_out
 );
 reg Write_once_status;
 always @(posedge Clk or negedge ip_resetn)
 if (~ip_resetn)
   begin
  	 Data_out <= 16'h0000; 
  	 Write_once_status <= 1'b0;
   end
 else if (write & ~Write_once_status) 
   begin
  	 Data_out <= Data_in & 16'hFFFE; // Input data written to register after masking bit 0
  	 Write_once_status <= 1'b1; // Write once status set after first write.
   end
 else if (~write)
   begin
  	 Data_out[15:1] <= Data_out[15:1];
  	 Data_out[0] <= Write_once_status;
   end
 endmodule

Ejemplo de código seguro

Secure Other

The first system component that sends a write cycle to this register can program the value. This could result in a race condition security issue in the SoC design, if an untrusted agent is running in the system in parallel with the trusted component that is expected to program the register.

Seguro Other

Trusted firmware or software trying to set the write-once field: 

  - Must confirm the Write_once_status (bit 0) value is zero, before programming register. If another agent has programmed the register before, then Write_once_status value will be one.

  - After writing to the register, the trusted software can issue a read to confirm that the valid setting has been programmed.

What changed: the unsafe sink is replaced (or the input is validated/escaped) so the same payload no longer triggers the weakness.

Lista de prevención

How to prevent CWE-1223

Architecture and Design During hardware design all register write-once or sticky fields must be evaluated for proper configuration.
Testing The testing phase should use automated tools to test that values are not reprogrammable and that write-once fields lock on writing zeros.

Señales de detección

How to detect CWE-1223

SAST High

Ejecuta análisis estático (SAST) sobre el código buscando el patrón inseguro en el flujo de datos.

DAST Moderate

Ejecuta pruebas dinámicas de seguridad de aplicaciones (DAST) contra el endpoint en vivo.

Runtime Moderate

Vigila los logs en tiempo de ejecución para detectar trazas de excepción inusuales, entradas malformadas o intentos de bypass de autorización.

Code review Moderate

Revisión de código: marca cualquier código nuevo que maneje entrada desde esta superficie sin usar los helpers validados del framework.

CWE-1223

Don't catalog this weakness. Prove it's reachable.

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Preguntas frecuentes

Frequently asked questions

¿Qué es CWE-1223?

¿Qué gravedad tiene CWE-1223?

MITRE no ha publicado una calificación de probabilidad de explotación para esta debilidad. Trátala como de impacto medio hasta que tu modelo de amenazas demuestre lo contrario.

¿Qué lenguajes o plataformas se ven afectados por CWE-1223?

MITRE lists the following affected platforms: Verilog, VHDL, System on Chip.

¿Cómo puedo prevenir CWE-1223?

During hardware design all register write-once or sticky fields must be evaluated for proper configuration. The testing phase should use automated tools to test that values are not reprogrammable and that write-once fields lock on writing zeros.

¿Cómo detecta y corrige Plexicus CWE-1223?

El motor SAST de Plexicus detecta la firma de flujo de datos para CWE-1223 en cada commit. Cuando hay coincidencia, nuestro agente Codex Remedium abre un PR de corrección con el código corregido, las pruebas y un resumen de una línea para el revisor.

¿Dónde puedo aprender más sobre CWE-1223?

MITRE publica la definición canónica en https://cwe.mitre.org/data/definitions/1223.html. También puedes consultar la documentación de OWASP y NIST para guías relacionadas.

Debilidades relacionadas

Weaknesses related to CWE-1223

CWE-362 Padre

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Race Condition for Write-Once Attributes

What is CWE-1223?

Real-world CVEs caused by CWE-1223

Ruta del atacante paso a paso

Vulnerable Verilog

Secure Other

How to prevent CWE-1223

How to detect CWE-1223

Don't catalog this weakness. Prove it's reachable.

Frequently asked questions

Weaknesses related to CWE-1223

Concurrent Execution using Shared Resource with Improper Synchronization ('Race Condition')

Hardware Logic Contains Race Conditions

Signal Handler Race Condition

Race Condition within a Thread

Time-of-check Time-of-use (TOCTOU) Race Condition

Context Switching Race Condition

Race Condition During Access to Alternate Channel

Permission Race Condition During Resource Copy

Further reading

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Sample evidence handover

Server-Side Request Forgery in `webhooks/receiver`