Cryptographic Operations are run Before Supporting Units are Ready

Incomplete Base
Structure: Simple
Description

Performing cryptographic operations without ensuring that the supporting inputs are ready to supply valid data may compromise the cryptographic result.

Extended Description

Many cryptographic hardware units depend upon other hardware units to supply information to them to produce a securely encrypted result. For example, a cryptographic unit that depends on an external random-number-generator (RNG) unit for entropy must wait until the RNG unit is producing random numbers. If a cryptographic unit retrieves a private encryption key from a fuse unit, the fuse unit must be up and running before a key may be supplied.

Common Consequences 1
Scope: Access ControlConfidentialityIntegrityAvailabilityAccountabilityAuthenticationAuthorizationNon-Repudiation

Impact: Varies by Context

Potential Mitigations 2
Phase: Architecture and Design
Best practices should be used to design cryptographic systems.
Phase: Implementation
Continuously ensuring that cryptographic inputs are supplying valid information is necessary to ensure that the encrypted output is secure.
Demonstrative Examples 1
The following pseudocode illustrates the weak encryption resulting from the use of a pseudo-random-number generator output.

Code Example:

Bad
Pseudocode

If random_number_generator_self_test_passed() == TRUE then Seed = get_random_number_from_RNG() else Seed = hardcoded_number

In the example above, first a check of RNG ready is performed. If the check fails, the RNG is ignored and a hard coded value is used instead. The hard coded value severely weakens the encrypted output.

Code Example:

Good
Pseudocode

If random_number_generator_self_test_passed() == TRUE then Seed = get_random_number_from_RNG() else enter_error_state()

Applicable Platforms
Languages:
Verilog : UndeterminedVHDL : UndeterminedNot Language-Specific : Undetermined
Technologies:
Processor Hardware : UndeterminedNot Technology-Specific : Undetermined
Modes of Introduction
Architecture and Design
Implementation