Improper Restriction of Security Token Assignment

Incomplete Base
Structure: Simple
Description

The System-On-A-Chip (SoC) implements a Security Token mechanism to differentiate what actions are allowed or disallowed when a transaction originates from an entity. However, the Security Tokens are improperly protected.

Extended Description

Systems-On-A-Chip (Integrated circuits and hardware engines) implement Security Tokens to differentiate and identify which actions originated from which agent. These actions may be one of the directives: 'read', 'write', 'program', 'reset', 'fetch', 'compute', etc. Security Tokens are assigned to every agent in the System that is capable of generating an action or receiving an action from another agent. Multiple Security Tokens may be assigned to an agent and may be unique based on the agent's trust level or allowed privileges. Since the Security Tokens are integral for the maintenance of security in an SoC, they need to be protected properly. A common weakness afflicting Security Tokens is improperly restricting the assignment to trusted components. Consequently, an improperly protected Security Token may be able to be programmed by a malicious agent (i.e., the Security Token is mutable) to spoof the action as if it originated from a trusted agent.

Common Consequences 1
Scope: ConfidentialityIntegrityAvailabilityAccess Control

Impact: Modify Files or DirectoriesExecute Unauthorized Code or CommandsBypass Protection MechanismGain Privileges or Assume IdentityModify MemoryModify MemoryDoS: Crash, Exit, or Restart

Potential Mitigations 1
Phase: Architecture and DesignImplementation
- Security Token assignment review checks for design inconsistency and common weaknesses. - Security-Token definition and programming flow is tested in both pre-silicon and post-silicon testing.
Demonstrative Examples 1
For example, consider a system with a register for storing an AES key for encryption and decryption. The key is of 128 bits implemented as a set of four 32-bit registers. The key register assets have an associated control register, AES_KEY_ACCESS_POLICY, which provides the necessary access controls. This access-policy register defines which agents may engage in a transaction, and the type of transaction, with the AES-key registers. Each bit in this 32-bit register defines a security Token. There could be a maximum of 32 security Tokens that are allowed access to the AES-key registers. The number of the bit when set (i.e., "1") allows respective action from an agent whose identity matches the number of the bit and, if "0" (i.e., Clear), disallows the respective action to that corresponding agent.
Let's assume the system has two agents: a Main-controller and an Aux-controller. The respective Security Tokens are "1" and "2". | Register | Description | Default | | --- | --- | --- | | AES_ENC_DEC_KEY_0 | AES key [0:31] for encryption or decryption | 0x00000000 | | AES_ENC_DEC_KEY_1 | AES key [32:63] for encryption or decryption | 0x00000000 | | AES_ENC_DEC_KEY_2 | AES key [64:95] for encryption or decryption | 0x00000000 | | AES_ENC_DEC_KEY_3 | AES key [96:127] for encryption or decryption | 0x00000000 | | AES_KEY_ACCESS_POLICY | AES key access register [31:0] | 0x00000002 |
An agent with Security Token "1" has access to AES_ENC_DEC_KEY_0 through AES_ENC_DEC_KEY_3 registers. As per the above access policy, the AES-Key-access policy allows access to the AES-key registers if the security Token is "1".

Code Example:

Bad
Other

The Aux-controller could program its Security Token to "1" from "2".

The SoC does not properly protect the Security Token of the agents, and, hence, the Aux-controller in the above example can spoof the transaction (i.e., send the transaction as if it is coming from the Main-controller to access the AES-Key registers)

Code Example:

Good
Other

The SoC needs to protect the Security Tokens. None of the agents in the SoC should have the ability to change the Security Token.

Applicable Platforms
Languages:
Not Language-Specific : Undetermined
Technologies:
Processor Hardware : UndeterminedSystem on Chip : Undetermined
Modes of Introduction
Architecture and Design
Implementation
Notes
MaintenanceThis entry is still under development and will continue to see updates and content improvements. Currently it is expressed as a general absence of a protection mechanism as opposed to a specific mistake, and the entry's name and description could be interpreted as applying to software.